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Main Causes of Voids: Insufficient Flux Volatilization of Solder Paste, Pad Oxidation, Improper Temperature Rise

Main Causes of Voids: Insufficient Flux Volatilization of Solder Paste, Pad Oxidation, Improper Temperature Rise

If the low-boiling-point solvents in the Flux are not fully expelled during the preheating stage after Solder Paste printing, they will vaporize instantly upon entering the reflow zone, generating internal pressure that pushes apart the molten solder and forms voids. This phenomenon is particularly prominent when using JJY SN100C series solder paste with a 0.12mm thick stencil to print large-pad QFN devices, especially when the conveyor speed is set to 1.8m/min without synchronously extending the preheating time to over 90 seconds, in which case the void rate often exceeds the 15% upper limit specified in IPC-A-610E.

Pad oxidation is a more hidden contributing factor. When FR4 boards are stored for over 72 hours without nitrogen protection, or when the OSP film thickness is below 0.3μm, the surface copper layer will slowly react with moisture in the air to form a mixed CuO/Cu2O film. This oxide layer not only hinders the wetting and spreading of the solder paste, but also suppresses the activation ability of the flux on the metal surface in the early stage of reflow, causing the molten solder to fail to fully wet the pad edges, and eventually leaving regular crescent-shaped voids at the bottom of the solder joint. These voids show high-contrast boundaries in X-ray inspection and have highly consistent positions.

Improper temperature rise covers both deviations in heating slope and peak temperature. For example, when the heating rate in the preheating stage exceeds 3℃/s, the resin components in the solder paste carbonize prematurely and wrap solvent molecules, blocking the volatilization channels. If the reflow peak temperature is below 235℃, the SnAgCu alloy phase in JJY solder paste cannot be completely melted, and the gas discharge resistance increases in the solid-liquid coexistence state. At this time, even if the holding time is sufficient, voids are still concentrated in the central area of the solder joint, mostly ranging from 80 to 120μm in size, which is far higher than the 20~50μm distribution range under normal processes.

We once used the same roll of JJY solder paste to conduct cross-validation on two reflow ovens. Oven A compressed the heating time in the 150℃→180℃ interval to 25 seconds, resulting in a void rate of 22%; after Oven B extended this interval to 42 seconds, the void rate dropped back to 9%. This shows that this temperature zone has a decisive impact on the removal efficiency of the main flux solvent (ethylene glycol monobutyl ether), rather than simply relying on overall furnace temperature bandwidth adjustment.

To quickly determine the cause of voids on site, it is necessary to simultaneously compare the volatile content in the solder paste batch re-inspection report (should be ≤1.8%), the stencil cleaning frequency record (it is recommended to perform a thorough ultrasonic cleaning after every 500 prints), and the solder joint gloss uniformity of the first 3 PCBs in post-reflow AOI. If local dullness occurs along with voids, priority should be given to checking for OSP failure on the pads; if the voids are diffuse and decrease with increasing placement pressure, it indicates that the flux volatilization path is blocked.

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